electronica. Weltleitmesse und Konferenz der Elektronik. 10.–13. November 2026, Messe München.

November 10-13, 2026 | electronica | Messe München | Germany

Welcome to the
edge lab LIVE! Attendee Hub

– Out of the Lab and Into the Field

Your complete guide to hands-on workshops, keynotes, sessions, evening networking events, and developer resources at edge lab LIVE! at electronica 2026.

90-minute Workshops from Industry-Leading Trainers

Take Home Hardware. Complimentary Access to Electronica. Starting at just €10.

See individual workshop descriptions for details.

90-minute Workshops from Industry-Leading Trainers

Take Home Hardware. Complimentary Access to Electronica. Starting at just €10.

See individual workshop descriptions for details.

Early Bird Workshop & Evening Event Pricing Ends October 31

November 10–13 • All events

edge lab LIVE! All Access Pass

Take home all workshop hardware, get a free electronica pass, and reserve seating for all four days of edge lab LIVE! sessions, workshops, and evening events, including CRA Day. Space is extremely limited!

€250

+ €4 booking fee

Go All In!

Hands-on sessions • All days

Hands-On Workshops — All Access Pass

Get hands-on with the latest technology. Join practical workshops led by industry experts and technology partners, and dive deeper into the tools, solutions and ideas shaping the edge. Take home hardware from all participating workshops and get a complimentary pass to electronica.

€200

+ €4 booking fee

Learn from the Best

Evenings • November 10–12

Evening Events — All Access Pass

Meet, connect and keep the conversation going. From IoT Stars to an Evening of Edge AI with Shawn Hymel to our CRA Industry Panel, make deeper connections with the edge lab LIVE! community.

€100

+ €4 booking fee

Get Connected

November 12 • CRA & Security

CRA Day — All Access Pass

Dive into the European Cyber Resilience Act and what it means for connected products. Get preferred seating for keynotes, technical sessions, and practical workshops for engineering teams building for CRA requirements, take home all workshop hardware, and get a free electronica pass.

€200

+ €4 booking fee

November 10–13, 9:30 AM – 6:00 PM

FREE edge lab LIVE!

Attend all edge lab LIVE! sessions for free! Seating subject to on-site availability. Workshop hardware, conference refreshments, and evening event access sold separately.

€0

Developer teams

ELLi for Dev Teams

Three ELLi All Access Passes for the price of two. Select one ELLi for Dev Teams (3 for 2) bundle in checkout.

3 for 2

€290 early bird through October 31, 2026. €500 regular price. Three tickets included in either bundle.

Select a session to view details. Swipe to see all four days on smaller screens.

Approved edge lab LIVE! programme for November 10-13, 2026. Session details are available through the timetable buttons and session cards below.

Download full program PDF

The embedded, IoT & edge AI developer zone at electronica

Engineers building electronics-enabled products don’t need theories or concepts. They need practical guidance and hands-on experience to get to market on time and under budget.

edge lab LIVE! (ELLi) is the premier technical conference and exhibition for edge AI, edge computing, and CRA-compliant embedded and IoT product development on open source and open standards technology. Taking place at electronica 2026 from November 10-13, ELLi is organized by renowned embedded trainers and implementers to help get your development project from prototype to production to deployment.

Explore 4 days of hands-on workshops, technical sessions, and networking events at electronica 2026. Register for all workshops or sign up for individual sessions for as low as €10 and get reserved seating, expert instruction, take home workshop hardware, and get a free ticket to electronica 2026.

Or, stop by edge lab LIVE! on November 10-13th to attend any session for free — reserved seating, workshop hardware, and electronica pass not included.

Show SessionsShow Exhibitors

November 10 • 9:30-10:30 AM

Keynote

Keynote: From Makers to Millions: Scaling Innovation for the AI Era

To be announced

Speakers

Arduino

Christian EderDirector Market Intelligence, congatec

Fausto Di SegniChief IoT & AI Officer at SECO

November 10 • 10:30-11:30 AM

Workshop

Voice to Action: Building Portable Edge AI Applications with Linux and Containers

What does it take to move an Edge AI application from a simple prototype to an architecture that can run across different embedded platforms?

In this interactive live session, we will build and evolve a voice-controlled Edge AI application together with the audience. Starting with a voice recognition model, an embedded Linux device will recognize spoken color commands and use them to control a physical light in real time.

The audience will then become part of the AI development process. Using only their smartphones and a shared link, attendees will contribute voice samples for a new color, creating a real dataset during the session. We will use Edge Impulse to train the updated model and deploy it as part of a containerized application. By the end of the session, the device will recognize a command that did not exist when the presentation started.

While the model is being trained, we will explore the architecture behind the demo: Yocto and Embedded Linux, containers, AI runtimes, hardware access, drivers and acceleration. We will discuss what can be portable inside a container, what remains dependent on the underlying platform, and why these boundaries matter for long-term product development and maintenance.

The same application will be shown on the Arduino® UNO Q, Arduino VENTUNO Q, Qualcomm Dragonwing™ IQ8 EVK, and Qualcomm Dragonwing IQ9 EVK platforms, illustrating how a common application architecture can scale from accessible development boards to professional Edge AI systems.

Rather than focusing only on inference, this session demonstrates the complete Edge AI development loop: collect data → train → package → deploy → run on real hardware → improve Attendees only need a smartphone to participate. All embedded hardware and live demonstrations are operated by the presenter.

What attendees will learn:

How data for an embedded voice AI application can be collected collaboratively using smartphones
How Edge Impulse simplifies dataset creation, training, and deployment for embedded AI
How an AI model can be integrated into a containerized Embedded Linux application
How Yocto, containers, AI runtimes, drivers, and hardware acceleration fit together
What can remain portable across different embedded platforms and what stays hardware-specific
How the same application architecture can scale from Arduino-class development boards to professional Edge AI platforms
Why application/OS separation matters for updates and long-term product maintenance

No development board or laptop is required. Attendees will participate using their smartphones to contribute voice samples to the live dataset. All training, deployment, and embedded hardware interaction will be demonstrated live by the presenter.

Trainer

Raul MuñozSenior Staff Engineer and Developer Relations Lead, Qualcomm

November 10 • 11:30 AM-12:00 PM

What If Edge Servers Were Composable? CXL, COM-HPC and CAPE

Edge servers are usually built around a fixed combination of processors, memory and accelerators. This works when workloads are predictable, but at the edge it can lead to expensive specialization and significant overprovisioning.

What changes if these resources are no longer permanently bound to a single server? CAPE, the European Union funded research project European Open Compute Architecture for Powerful Edge, is developing an open and modular edge cloud architecture in which compute, memory and accelerators can be composed according to workload requirements. The architecture combines modular COM-HPC compute nodes, heterogeneous processors and accelerators, switched PCIe and CXL fabrics, and open server management.

This session uses the CAPE architecture to explore the engineering consequences of making edge infrastructure composable. How should compute nodes, accelerators and pooled memory be discovered and assigned? Who configures and manages the fabric? Which functions belong in platform firmware and which should be exposed through standard interfaces? And when does CXL memory pooling improve resource utilization enough to justify the additional latency and system complexity?

We will examine how CAPE approaches these questions through PCIe and CXL based resource composition, Redfish and openMPMC for hardware management, and integration with Kubernetes based edge cloud orchestration. We will also distinguish what can already be implemented using current PCIe technology from capabilities that depend on the evolving CXL ecosystem.

The session will conclude with practical design lessons for building modular and heterogeneous edge systems using open standards, including which interfaces need to remain open for multi-vendor interoperability. We will also discuss how these interfaces and open source components can be sustained beyond individual research projects, including the emerging Open Federated Edge Cloud Infrastructure Alliance, OFEIA, as a possible community and governance layer.

Trainer

Jens HagemeyerResearch Associate, CAPE

November 10 • 12:00-1:30 PM

Workshop

Accelerate Embedded Development with the FRDM Automotive Platform: Exploring Real-Time Control, Sensing, and Visualization

Explore how NXP's FRDM automotive development platform, demonstrated with the FRDM-A-S32K344 board, helps engineers move quickly from concept to prototype. Through hands-on exercises, participants will work with S32K3 MCU capabilities, configure and validate applications using NXP software tools, and use FreeMASTER for real-time monitoring, visualization, and debugging. The workshop focuses on a practical workflow for faster prototyping, testing, and system optimization.

Relevant links: https://mcuxpresso.nxp.com/appcodehub?deviceFamily=s32k,s32m; https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM-A-S32K344

Trainer

Radek SestakSr. Automotive Applications Engineer

November 10 • 1:30-3:00 PM

Workshop

Build Professional UIs with LVGL on Riverdi's STM32U5 Board

In this 90-minute hands-on workshop, we will use LVGL Pro to build a modern UI for Riverdi's STM32U5 display board. We start with a short overview of LVGL Open, LVGL Pro, and LVGL Safe to see what they are used for and how they connect to form a complete UI ecosystem.

After that, in a longer hands-on session, we will create a project for the Riverdi board, take a design from Figma, import it into LVGL Pro, make some changes, and finally export the C code, compile it, and flash it to the board.

While using LVGL Pro, you will also gain hands-on experience with LVGL's declarative XML language. You will learn how to create reusable components, connect live data with bindings, add animations and translations, and more. At the end, you will know how to go from a design file to a running UI on real hardware in minutes and make changes with confidence.

Trainer

Gábor Kiss-Vámosi

November 10 • 3:00-3:30 PM

Stop Hacking Hardware Test Scripts—Hack on Hardware with Friends

Test automation in embedded systems is often limited by physical hardware access. Teams build custom setups that work locally but do not scale, leading to fragmented workflows and duplicated effort.

We present a unified approach based on Labgrid, developed for a large-scale board farm at Analog Devices. The system connects hundreds of devices across locations and exposes them through a single interface. Hardware remains local but becomes globally accessible, allowing engineers and automated agents to interact with real targets as if they were on their desk. The key idea is to treat hardware as a shared, schedulable resource, enabling collaborative development, reproducible testing, and CI/CD integration. Built on and contributing to the open-source Labgrid ecosystem, our approach emphasizes extensibility and collaborative development. We also explore how AI-driven agents can directly access and operate real hardware to debug issues and assist development. We share practical lessons and demonstrate how testing can evolve from isolated setups to scalable, and open infrastructure.

Trainer

Ozan DurgutEmbedded Linux Engineer, Analog Devices

November 10 • 3:30-4:00 PM

One Project, Many Boards: Building a Maintainable Yocto Platform Across Different Hardware

Supporting one embedded Linux board is relatively straightforward. Supporting four completely different boards is where things start getting interesting.

Different processors, BSPs, bootloaders, kernels, and vendor layers can easily turn a product family into a collection of increasingly independent projects. That creates duplication, makes updates harder, and turns adding the next hardware platform into another engineering exercise. It doesn’t have to be that way. In this session I’ll show how I built a single Yocto Project environment that supports multiple boards and architectures while keeping the common parts of the system genuinely common. We’ll look at how the project is structured, where hardware-specific configuration belongs, how KAS is used to compose each target, and how the same distribution and userspace can be maintained across very different platforms. This is not a theoretical architecture. It is the approach currently used to build the Edge Compute Workbench, and we’ll look at the real configuration and the compromises needed to make it work.

Trainer

Iain "Ming" Menzies-RuncimanEdgeBench.io

November 10 • 4:00-4:30 PM

Yocto, Containers and Edge AI: Making All the Pieces Work Together

Building an embedded Linux product is already complex. Add containers, hardware-accelerated AI, long-term software maintenance and new cybersecurity requirements, and the architecture can quickly become difficult to manage.

Where should the AI runtime live? Which libraries belong in the Yocto image and which should be packaged inside the container? How does a container access cameras, GPUs, NPUs and other hardware accelerators? Who owns the drivers? And how do you update all these layers without turning every software release into a full system integration exercise?

This session explores a practical architecture for combining a Yocto-based embedded Linux host with containerized applications and hardware-accelerated Edge AI workloads.

We will follow the software stack from the hardware up:

Hardware → Linux/BSP → Yocto → Container Runtime → AI Runtime → AI Application

Along the way, we will examine the boundaries between these layers and the problems engineers encounter when AI applications need access to hardware devices, drivers and host libraries.

The session will also discuss why separating the platform from the application can simplify development and maintenance. Yocto can provide a controlled and reproducible Linux platform while containers allow application and AI teams to iterate independently.

Finally, we will connect this architecture with product lifecycle and security requirements such as the EU Cyber Resilience Act, exploring how reproducible builds, software component management, vulnerability handling and update strategies become increasingly important for connected products.

Attendees will leave with a practical mental model for designing an embedded Linux platform capable of running modern Edge AI workloads without treating Linux, containers, AI and security as four independent problems.

Trainer

Raul MuñozSenior Staff Engineer and Developer Relations Lead, Qualcomm

November 10 • 4:30-6:00 PM

Workshop

SMARC Carrier Board Design: What Really Matters — 90 Minutes of Practical Design Guidance for Hardware Engineers

This 90-minute workshop provides a practical introduction to SMARC carrier board development from a hardware designer’s perspective. Rather than focusing on interface specifications and signal definitions, the workshop highlights the design decisions that most frequently lead to project delays, redesigns, and bring-up challenges.

Using real-world examples, attendees will learn how to correctly interpret SMARC documentation, avoid common power-management mistakes, manage interface multiplexing, plan for future module migrations, and perform effective design reviews before PCB release.

The workshop is intended for hardware developers, system architects, and project engineers who are planning to create or review SMARC carrier board designs.

Key Takeaways:

Understanding the responsibilities of the module and carrier board
Avoiding common power and boot-related design issues
Correctly selecting and implementing SMARC interfaces
Reviewing layouts for high-risk design mistakes
Designing carrier boards for future scalability and module migration

Trainer

Martin UnverdorbenChairman of SDT.01 | SGET e.V.

November 10 • 6:00-9:00 PM

Side Event

IoT Stars

Engage in honest, no-bullsh*t conversations about the state of IoT, embedded development, and Edge AI. IoT Stars, a community of IoT professionals, is hosting an exclusive gathering on Tuesday, November 10th, during the opening night of electronica.

Meet the right people, join unique discussions, and get inspired while having a drink, a bite, and a laugh.

Sign-up today! It's a paid event, reach out to one of our partners to get a free invite

What to expect:

Meet 200 strongly opinionated innovators in the embedded, IoT and edge AI space
Interactive keynotes, fireside chats and panels from industry leaders
Free drinks & food

Hosted by Marc Pous & Laurens Slats Marc Pous, also known as the IoT Giant, is the founder of IoT Stars and a long-time advocate for the Internet of Things and edge AI. With over 15 years of experience, he has been actively building IoT products, communities, and events around the world.

Laurens Slats works at the intersection of IoT, developers, and community building. Over the past years, he has helped IoT teams grow engaged developer communities, often around open-source technologies and platforms.

Trainers

Marc PousFounder of IoT Stars

Laurens SlatsIoT community builder

November 11 • 9:30-10:00 AM

Keynote

The Rise of Physical AI: The Next Evolution of Intelligent Systems

The AI conversation is rapidly moving beyond generative AI and digital assistants. The next frontier is Physical AI: systems that perceive, reason, and act in the real world. From industrial automation and robotics to intelligent vision systems and autonomous machines, organizations are beginning to deploy AI where physical outcomes matter most.

This keynote explores the forces driving this transition, the technical challenges companies must overcome, and the emerging architectures enabling intelligent machines at scale. Attendees will gain insight into where the market is heading and what it will take to build the next generation of AI-powered products.

Trainers

Mark ReitenSenior Corporate Vice President and Executive Leadership Team

Orr DanonAppointed Vice President, AI

November 11 • 10:00-11:15 AM

Workshop

Bringing Amazon Sidewalk to Life: ST MEMS Sensor Monitoring with /IOTCONNECT

Discover how to accelerate the development of connected sensing applications using Amazon Sidewalk, the ST NUCLEO-WL55JC development board paired with the X-NUCLEO-IKS5A1 MEMS sensor expansion shield, and /IOTCONNECT. In this live session, you'll see how sensor data can be collected from edge devices, transmitted over Amazon Sidewalk's low-power network, and visualized through /IOTCONNECT for real-time monitoring and actionable insights. The solution demonstrates a streamlined approach to building secure, scalable IoT applications while reducing development complexity and time to deployment.

Workshop requirements:

Participants must bring their own laptop with access to a desktop web browser (charging outlets are available)
Optional: review the QuickStart guide: https://github.com/avnet-iotconnect/iotc-stm32-sidewalk

Trainers

Steven DettloffIoT Solutions Manager, Avnet

Thibault RichardField Application Engineer, EBV Elektronik

November 11 • 11:15 AM-12:30 PM

Workshop

Build, Sense, and Visualize featuring the Infineon PSOC™ Edge

Join a hands-on workshop exploring Infineon DEEPCRAFT™ AI models running on the PSOC™ Edge E84 AI Evaluation Kit. All participants will be provided with a development kit to use during the workshop as you run edge AI use cases, explore sensor telemetry, and connect data to /IOTCONNECT powered by AWS for real-time dashboards and insights.

Learning Objectives:

Build and deploy AI-powered edge applications using Infineon DEEPCRAFT™ AI models on the PSOC™ Edge E84 AI Evaluation Kit.
Capture and analyze real-time sensor data from the development kit to enable intelligent sensing and decision-making at the edge.
Evaluate practical edge AI use cases, including object detection, anomaly recognition, and sensor-based intelligence while running AI models locally on the device.
Connect edge-generated data to /IOTCONNECT powered by AWS for secure cloud connectivity, device management, and telemetry streaming.
Create real-time dashboards and visualizations that transform sensor data into actionable insights for monitoring, analytics, and business applications.

Trainers

Steven DettloffIoT Solutions Manager, Avnet

Thibault RichardField Application Engineer, EBV Elektronik

November 11 • 12:30-2:00 PM

Workshop

Accelerate your Design Journey with the Developer Hub Integrated with Renesas 365

Edge AI Motion Tracker on Hubble Network … Free development kit included.

Renesas and Hubble show how to build a working edge AI device in minutes. A Renesas RA microcontroller runs a Reality AI motion model on sensor data, and a Renesas DA14531 Bluetooth SoC reports each detected event (drop, fall, gesture) over the Hubble Network. This workshop guides developers from concept to a working prototype through the Renesas 365 unified developer journey, leveraging scalable hardware and reusable software. Attendees will also receive a free development kit, allowing them to start building immediately.

Trainers

Hooman ForoughiVP Application Engineering, Renesas

Izik GoldraichPrincipal Software Engineer, Renesas

November 11 • 2:00-3:30 PM

Workshop

AI at the Edge with i.MX Applications Processors: Enabling the Next Generation of Secure and Scalable Devices

Get hands-on with NXP's i.MX 95 FRDM development platform and explore its powerful feature set from the ground up. Connect a display, camera, and keyboard, launch real-world AI demos via GoPoint, and run applications on the Arm® Cortex®-A55 — all with minimal setup time.

Discover how the i.MX 95 accelerates product development while addressing modern demands for cybersecurity, power efficiency, and lifecycle management. Whether you design for industrial, automotive, smart city, or IoT applications, you will leave with practical insights to accelerate your next design-win.

Trainer

Mubeen AbbasTechnical Manager

November 11 • 3:30-5:00 PM

Workshop

Reinforcement Learning for Robotics

Reinforcement learning is reshaping how robots learn to move. With recent breakthroughs at labs like ETH Zurich, Boston Dynamics, and Disney Research, walking robots are now handling rough terrain and challenges they were never explicitly trained for. The good news is that you don't need a fully equipped research lab to get started. In this hands-on workshop, participants will train an AI agent from scratch to balance a tiny wheeled robot, then watch it run on real hardware.

Using the MuJoCo physics simulator and Python, we'll build a complete RL training pipeline using the Proximal Policy Optimization (PPO) algorithm. We'll tackle two of the most common real-world challenges in robotics: how to make an agent that's actually robust (using domain randomization and curriculum learning)... and how to transfer a policy learned in simulation onto a physical robot (a problem known as the "sim-to-real" gap). By the end of the session, attendees will leave with hands-on intuition for modern robot learning.

Target Audience: Embedded developers and makers with some programming experience. No prior robotics or RL knowledge required, though familiarity with Python, Arduino, and basic ML concepts will help participants get the most out of the session.

Trainer

Shawn HymelFounder at Skal Risa

November 11 • 5:00-5:30 PM

Scaling Physical AI Value from Smart Sensors to Industrial Intelligence

As intelligence moves closer to the source of data, how do engineers decide what to process inside a sensor, on a microcontroller, or at an industrial gateway? Increasingly, the answer appears to be physical AI, which connects sensing, intelligence, and action, enabling machines to interpret their surroundings and respond in the real world.

This panel brings together semiconductor, condition monitoring, and market research perspectives to explore how physical AI can deliver measurable industrial value. Antonio Cirone of STMicroelectronics, Johan Arvidsson of SPM Instrument AB, and Satyajit Sinha of IoT Analytics will examine the path from high-quality measurements to actionable machine intelligence. The discussion will connect sensor-level signal processing, finite state machines, machine learning, and neural-network acceleration with practical requirements for monitoring motors, pumps, bearings, and other industrial equipment.

Key questions include how measurement quality affects anomaly detection, how to balance power consumption and latency against analytical complexity, and when local intelligence can reduce data transmission while preserving the information needed for reliable maintenance decisions. Broader market trends—including AI-enabled microcontrollers, gateways, and robotics—will provide context for choosing architectures that can scale from initial evaluation to deployment.

Attendees will gain methods for matching sensing and computing capabilities to application needs, assessing deployment tradeoffs, and identifying dependable, industrial physical AI solutions.

Trainers

Antonio CironeProduct Marketing Engineer, Motion MEMS, STMicroelectronics

Johan ArvidssonKey Account Manager, SPM Instrument AB

Satyajit SinhaPrincipal Analyst, IoT Analytics

November 11 • 5:30-9:00 PM

Side Event

An Evening of Edge AI and Edge Awards with Shawn Hymel

Spend one evening getting up to speed on everything that's happening in edge AI.

Join the key people shaping the edge AI field for an evening of live demos, conversations, food and drinks. See what edge AI can do today, meet the technology enablers behind it, and join us for the official electronica Edge Awards ceremony.

What to expect:

Meet key players from across the edge AI ecosystem
Watch 6 cutting-edge edge AI demos, live
Join the official electronica Edge Awards ceremony
Free drinks, food and, of course, bow ties!

Trainers

Shawn HymelFounder at Skal Risa

Olivier BlochHost, IoT Show podcast

November 11 • 5:30-6:00 PM

Where Should the AI Run? Making the MCU, NPU, or Cloud Decision

When adding AI to an embedded product, the first architecture question is often the hardest: should the workload run on a standard MCU, use dedicated AI acceleration, or move partly to the cloud?

This session presents a practical framework for making that decision based on five factors: model complexity, latency, memory, power, and connectivity/privacy requirements. Using a small open-source AI model running on a Cortex-M-class device as a real-world case study, we’ll show how to translate product requirements into measurable engineering constraints, then use those measurements to determine when an MCU is sufficient and when the architecture needs to change. The session will give attendees a reusable way to evaluate edge AI workloads across platforms.

Attendees will leave with a simple decision framework they can apply early in development to avoid both over-engineering and choosing hardware that cannot meet the product’s needs.

Trainers

Tess KassierRiseLink.ai

Guochu ChenSoftware Director, RiseLink

November 12 • 9:30-10:00 AM

Keynote

How to Think About CRA Compliance

The EU Cyber Resilience Act is moving from legislative text into engineering practice. Its exploited vulnerability and incident reporting obligations began applying in September 2026; the broader product requirements follow in December 2027. For teams shipping embedded hardware and software, the immediate challenge is translating that timeline into decisions about product scope, risk assessment, architecture, evidence, and support.

This talk will give manufacturers a practical framework for navigating the uncertainty around the CRA. The speaker will use her first-hand experience developing CRA standards, working with regulators, and collaborating with other CRA experts to give practical guidance on topics such as identifying the product's intended purpose, developing a cybersecurity risk assessment, using secure design and development practices, handling vulnerabilities, and implementing other state-of-the-art security practices. Attendees will leave with a clear method for making decisions about what work to prioritize and how to document it as CRA guidance and standards mature.

Trainer

Valerie AuroraCRA consultant

November 12 • 10:00-11:30 AM

Workshop

Cyber Resilience Act: From Compliance to Competitive Advantage

The EU Cyber Resilience Act (CRA) marks a fundamental shift in how products with digital elements are designed, developed and maintained throughout their lifecycle. In this workshop, participants will gain a practical understanding of key CRA requirements and the engineering decisions needed to address them.

We will explore topics such as risk assessment, threat modeling, vulnerability management and lifecycle security, highlighting where security-by-design can help reduce complexity and accelerate CRA readiness. Using practical examples, we will discuss how NXP's security technologies, EdgeLock 2GO lifecycle management services and PSIRT (Product Security Incident Response Team) processes can support manufacturers in addressing key CRA requirements and preparing for long-term compliance.

Key Takeaways:

Understand the role of security-by-design in addressing CRA requirements.
Learn how risk assessment, threat modelling and vulnerability management contribute to CRA readiness.
Discover how NXP's security portfolio, EdgeLock 2GO and PSIRT processes can help support key CRA requirements throughout the product lifecycle.

Trainer

Jenirathese NadarMarketing Manager – Security

November 12 • 11:30 AM-12:00 PM

Locking down the Edge: How NVIDIA and OEMs Use TPM 2.0 to Secure Physical AI and Meet EU CRA requirements

Edge and Physical AI systems must guarantee the secure and safe execution of compute tasks. To solve this, NVIDIA builds Trusted Platform Modules directly into its enterprise-ready platform for physical AI, the IGX Thor. The commercial ecosystem has fully adopted this hardware-backed approach: Lenovo and Wincomm released new ruggedized, industrial edge AI computers featuring discrete TPM 2.0 solutions to ensure regulatory compliance and data security.

This 20-minute talk features a demo of Secure GPIO for Physical AI using TPM 2.0 and provides concrete details how TPM 2.0 protects Physical AI while remaining accessible. We detail advanced security guarantees beyond basic key storage, covering authenticated bus communications and hardware tamper defenses. Finally, we map these hardware capabilities directly to EU Cyber Resilience Act (CRA) compliance. Key takeaways: Mapping Edge AI security needs to TPM 2.0 capabilities. Advanced TPM 2.0 security capabilities matching Physical AI needs. Mitigating physical tampering and bus-level attacks on Edge hardware. Meeting EU CRA requirements using TPM 2.0.

Trainer

Dimi TomovCEO, EnactTrust

November 12 • 12:00-12:30 PM

From Unauthenticated Netboot to CRA-ready Industrial Gateways: Measured Boot and Remote Attestation on Bare-metal RISC-V

Cloud-enabled industrial gateways bridging Modbus field equipment to HTTPS/MQTT backends over VPN are directly in scope of the most demanding requirements made by the EU Cyber Resilience Act (CRA): deployed unattended in accessible locations, holding the VPN and cloud credentials that make them a pivot into both OT and cloud networks, and re-imaged over the network. Yet the network-boot tooling this lifecycle relies on executes unauthenticated images by design, in direct conflict with the CRA's software-integrity and secure-update requirements. Even signed images cannot answer the question an unattended fleet poses: how does an operator know, remotely and continuously, that a deployed gateway runs the software that was shipped?

This session demonstrates an end-to-end, fully open-source answer on RISC-V. Building on an already-released bare-metal programming framework and network-boot framework, we construct a complete trust chain: a minimal, PMP-protected firmware layer as the trusted base; authenticated network boot with signature verification and anti-rollback, doubling as the CRA-mandated secure update path; DICE-style measured boot providing device identity without requiring a TPM; and RATS-based remote attestation that gates release of VPN and MQTT credentials on proven platform state. A tampered device cannot even join the network. Attestation reference values are derived from reproducible builds of the boot chain, tying platform verification to the SBOM and supply-chain transparency the CRA expects of manufacturers and integrators. This technical session distills lessons learned building and releasing these frameworks, from the pitfalls of key derivation without a hardware root of trust to what breaks when netboot signing is integrated in real-world provisioning workflows. The session concludes with a scripted QEMU demonstration that shows (i) a tampered image rejected at boot-time, and (ii) a verified gateway completing attestation, receiving its credentials, and publishing Modbus telemetry to an MQTT broker. This demonstration provides a practical mapping from each mechanism in an open-source stack to the CRA obligations it addresses.

Trainers

Nick KossifidisPrincipal Research Engineer

Manolis MarazakisPrincipal Staff Research Scientist, FORTH (Greece)

November 12 • 12:30-1:00 PM

From Firmware Build to CRA Evidence: A Reproducible SBOM and Vulnerability Workflow

Generating an SBOM for one firmware build is increasingly straightforward. Maintaining a defensible chain between the shipped firmware, its components, vulnerability findings, engineering decisions, and later security updates is much harder.

Using a small connected Zephyr application, this session demonstrates a vendor-neutral workflow from build to reviewable CRA evidence. The build produces an SPDX inventory and build provenance. Open tooling validates and normalizes the component data, maps public vulnerability records, and creates a review queue. A VEX-based decision then records whether a finding is affected, not affected, fixed, or still under investigation, together with the rationale, supporting evidence, reviewer, and product versions concerned. A simple policy gate determines whether the release can proceed without treating scanner output as an automatically approved engineering decision.

The demonstration also covers failure modes common in embedded products: ambiguous component identifiers, supplier patches not reflected in public databases, a CVE that matches a library but not the compiled configuration, changed components between firmware versions, and a new advisory published after release.

Attendees will leave with a reproducible reference architecture, sample SPDX and VEX artifacts, a minimum data model for traceable vulnerability decisions, and a practical checklist for adding the workflow to an embedded CI/CD pipeline. The session focuses on engineering implementation and human-governed evidence, not legal theory or a commercial platform.

Trainer

Muhammad AashirFounder and CEO, AegisSafeForge

November 12 • 1:00-2:00 PM

Workshop

CRA Conformance and Raspberry Pi: A Collaborative Analysis of Compliance Dos and Don’ts

Regular admission: €40

Booking fee: €1.75 per ticket.

What changes when a familiar Raspberry Pi development platform becomes the basis of a product sold in the EU? Working from a defined example device and use case, participants will build a preliminary CRA requirements and evidence map. The exercise begins with a detailed use case analysis, and then moves to the manufacturer’s Article 13 risk assessment. We finish with comparing the tests design choices against Annex I: secure default configuration, protection from unauthorized access, confidentiality and integrity of data and software, security updates, and vulnerability handling.

The group will examine where Raspberry Pi documentation and standard software can help, including secure boot provisioning, disk encryption, image generation, software bills of materials, and security disclosures. It will also identify work that remains with the product manufacturer: defining the deployed configuration, securing exposed interfaces and credentials, managing keys, testing the complete system, documenting dependencies, and maintaining an update and response process over the support period.

The outcome is a practical set of dos and don’ts, open questions, and evidence requests that engineers can adapt to their own designs. The workshop will assess a hypothetical integration; it will not certify a Raspberry Pi product.

Trainer

Marta RybczynskaOpen Source Security & CRA Expert

November 12 • 2:00-3:30 PM

Workshop

How to Be a Secure Component in the Embedded Product Supply Chain

Regular admission: €40

Booking fee: €1.75 per ticket.

A system-on-module may be designed for secure operation, but its security properties only help an integrator when they can be configured, tested, documented, and maintained in the finished product. Using embeddedTS' NXP i.MX-based hardware as a working example, Marta Rybczynska and embeddedTS will examine what it takes to supply a component that supports a customer’s CRA assessment.

The session will trace the handoff from component to product: identifying the supplied hardware, firmware, and software; describing the boot chain and configurable security features; defining assumptions about the carrier board and operating environment; and specifying what the integrator must implement. It will connect those decisions to CRA risk assessment, product security and vulnerability handling requirements, and requirement to give integrators information needed for their own compliance work.

The example will also examine the operational handoff: software component records, vulnerability contacts, update responsibilities, support periods, and the evidence needed when a component changes. Attendees will leave with a concrete model for documenting security responsibilities across the supplier–integrator boundary.

Trainer

Marta RybczynskaYgreky

November 12 • 3:30-4:00 PM

Patch at Scale: What CRA-Ready Software Updates Look Like in the Real World

Under the Cyber Resilience Act, discovering a vulnerability is not enough. OEMs need a secure and repeatable way to remediate vulnerabilities across products already operating in the field. For embedded and IoT teams, that becomes especially challenging across heterogeneous hardware, software versions, unreliable networks, and large device fleets.

This session examines the engineering practices behind secure vulnerability remediation at scale, including identifying affected devices, signed software artifacts, phased deployments, automated rollback, update verification, and maintaining an auditable remediation history.

Trainer

Jana PerićEmbedded Linux Engineer, Mender.io/Northern.tech

November 12 • 4:00-4:30 PM

From Visual Workflow to CRA-Ready Edge Deployment

Industrial AI prototypes become products when they can run alongside production equipment, recover from faults, and maintain reliability over years or decades of updates. Ensuring that they also do so securely is precisely what the Cyber Resilience Act (CRA) was created to enforce.

This session uses a SECO production line monitoring demonstrator to examine how systems can address vulnerabilities through security updates and maintain alignment with Annex I, Part I, point 2(c) of the EU Cyber Resilience Act. Using a SMARC computer-on-module-based Modular Vision HMI running a vision inference and control workflow developed in Clea Studio AI, we will follow a change from a controlled Clea OS production image’s software bill of materials through vulnerability assessment, update packaging, deployment, and rollback. We will also examine how time-critical control can be separated from AI processing when the device is in an offline state.

Attendees will leave with a practical model for making updatable, supportable industrial edge products that align with CRA guidelines, as well as the ability to assess whether a vulnerability can be corrected across deployed devices.

Trainer

Matteo Del BalioProduct & Program Manager

November 12 • 4:30-6:00 PM

Workshop

Edge Security for Cellular IoT Devices: How to Ensure Edge Security and CRA for Cellular IoT Devices with Exein and Deutsche Telekom

Get hands-on with cellular IoT and security. In this interactive workshop, participants will receive an nRF9151 development kit and work step by step with our experts to secure a cellular IoT device using Exein Runtime for Zephyr. Together, we will explore the setup, configuration, and security options, giving you a practical experience.

Trainers

Thomas RoosSenior Field Solutions Engineer, Exein

Dominic RichterProduct and Partner Management at DT IoT

November 12 • 6:00-8:00 PM

Side Event

CRA Expert Panel: From Requirements to Evidence Across the Embedded Supply Chain

After a day of technical sessions, this panel will test how CRA requirements hold up across real embedded development workflows. Moderator Satyajit Sinha will bring together standards, security, component, and product perspectives to examine the decisions that cannot be settled by a generic compliance checklist. The discussion will follow an embedded product from component selection through release and support. How should an OEM use a supplier’s security claims and documentation without treating them as proof of conformity for the finished device? What evidence supports a risk assessment when boot firmware, a Linux distribution, applications, and cloud services come from different sources? Who receives a vulnerability report, who fixes the affected software, and how do suppliers and integrators coordinate a timely update? What to do about SBOMS – are they effectively mandatory to deliver to your customers? Panelists will also address what teams can (and should) act on today without waiting for future clarifications.

Audience questions will close the session. The goal is to give engineering teams clearer ownership boundaries, better questions for suppliers, and a sharper plan for turning security controls into defensible product evidence.

Panelists

Satyajit SinhaSenior Principal Analyst, IoT Component, Connectivity & Security, IoT Analytics

Marta RybczynskaYgreky

Andreas KoflerFounder & Managing Director, bavariamatic GmbH

November 13 • 9:00 AM-12:00 PM

Meetup

Linux Foundation: Zephyr Project Meetup

The meetup will feature presentations covering products powered by Zephyr, project subsystems, development experiences, and features you may not have explored yet. Connect with the local community, expand your network, and learn more about reliable, low-power embedded systems. Whether you are an experienced embedded developer or just getting started, this meetup offers an opportunity to learn, exchange ideas, and connect with others working with Zephyr.

The event takes place at electronica, Hall C5, in the edge lab LIVE! area. Register below for free admission to the Zephyr Meetup and a free one-day pass to electronica. No discount code is required.

Seats are limited, so we encourage you to register early to secure your spot.

Friday, November 13 • 9:15-9:35 AM

Meetup

Getting OTA Working on Zephyr: It Can't Be That Difficult, Can It?

I've spent years working with embedded Linux using OTA updates with Mender and A/B root filesystems. So when I discovered that Mender also had a client for Zephyr, I thought it would be interesting to see how difficult it would be to get it working on a microcontroller.

As it turns out, quite difficult. Starting with an ESP32, I set out to build a complete OTA update system. Not just connecting to a server and downloading a file, but installing new firmware, rebooting into it and retaining the ability to roll back if something went wrong.

Along the way, I encountered TLS problems, memory exhaustion, Ethernet driver issues, stack overflows and a few misunderstandings about how MCUboot, Zephyr sysbuild and Mender fit together. Eventually, after abandoning the ESP32 in favour of an NXP FRDM-MCXN947, I had a working system.

In this talk, I'll walk through the problems I encountered, how I investigated and resolved them, and what I would do differently if I were starting again. I'll also look at the security considerations that separate a working demonstration from something suitable for production.

The result is a practical look at what it really takes to implement OTA updates on Zephyr, from the perspective of an embedded Linux engineer learning that microcontrollers have their own ideas about how things should work.

Trainer

Iain Menzies-RuncimanEdgeBench.io

Friday, November 13 • 9:40-10:00 AM

Meetup

Zephyr Snow Predictor

Autumn has started, winter will come. In some regions of the world, like here in Munich, this often rhymes with snow.

In this talk, we will discuss how to implement a standalone Edge AI snow predictor for microcontrollers based on the evolution of physical quantities like temperature, humidity, or pressure.

We will show:

what it means to create and train a neural network model
how to run an inference model on Zephyr using tflite-micro
how Zephyr Ecosystem helps during the product development lifecycle

The demo will target an Arduino Nano 33 BLE Sense, but we will use the abstractions offered by Zephyr to keep our firmware portable.

Benefits for the audience: Attendees will get a behind-the-scenes look at the "create model" button in their AI-studio and learn some best practices for implementing Edge AI solutions on Zephyr.

Trainer

Loic DomaigneDoulos

Friday, November 13 • 10:05-10:25 AM

Meetup

Konfig & Devicetree: The Good, the Bad, and the Ugly

Zephyr has a famously steep learning curve, and even once you're past it, it's not always clear what you actually gained — or what you're still paying for. This talk takes a hard look at two of Zephyr's foundational mechanisms, Kconfig and Devicetree, through the lens of real project experience. We'll cover what these systems genuinely get right (flexibility, hardware abstraction, build-time configurability), where they cause friction or confusion in practice (debugging overlays, config sprawl, tooling gaps), and where they can actively work against you if you're not careful — including a look at Zephyr's Devicetree being resolved entirely at compile time, unlike Linux's exchangeable, runtime-loadable DT blobs, and what that means for teams that need dynamic hardware reconfiguration. The talk closes with a forward-looking view: how these mechanisms are evolving, and what teams adopting Zephyr today should watch for. Aimed at engineers who are past the "hello world" stage and want an honest, experience-based assessment rather than marketing material.

Trainer

Joe SchneiderDojo Five

Friday, November 13 • 10:30-10:50 AM

Meetup

Bringing Robust OTA Updates to Zephyr: Real-World Insights & Approaches

As real-time operating systems like Zephyr become the go-to for resource-constrained and latency-sensitive applications, enabling secure and robust over-the-air (OTA) updates is more important than ever. In this session, Luis Ramírez-Vargas, Embedded Linux Customer Engineer for Mender, will share practical insights on implementing OTA update capabilities for Zephyr-powered devices. Drawing on community feedback and early field experience, this talk will walk through proven approaches to OTA update enablement, key technical considerations for OTA for Zephyr, and common challenges developers face when updating real-time operating systems at scale. Attendees will leave with a better understanding of how to bring modern OTA update capabilities to their Zephyr-based projects.

Trainer

Ed WatsonNorthern.tech

Friday, November 13 • 10:55-11:15 AM

Meetup

CRA-Ready by Design: What Zephyr Gives You – and Why Staying Upstream Matters

Vulnerability reporting under the Cyber Resilience Act has applied since September 2026, and from December 2027 every product with digital elements placed on the EU market must meet its essential requirements. For teams building MCU-based products, the choice of RTOS, and how closely you stay with it, has become a compliance decision.

This talk maps CRA requirements to concrete Zephyr building blocks: secure boot and firmware updates with MCUboot, SBOM generation with west spdx, TF-M and PSA, the project's security process and LTS releases. It then makes the case for staying upstream: every out-of-tree driver or private fork is code you alone have to monitor, patch and support for the entire support period. Drawing on Bavariamatic's recent mainline contribution of SmartFusion2 SoC-FPGA support, the talk shows what it takes to get there and why it pays off.

Finally, it is honest about the gaps no RTOS closes for you, from risk assessment and support period to update infrastructure and vulnerability handling, and gives attendees a practical checklist for their own Zephyr-based product.

Trainer

Andreas Koflerbavariamatic GmbH

Friday, November 13 • 11:20-11:40 AM

Meetup

Root of Trust to Release: Boot-Level Security with Zephyr and MCUboot on the PIC32CK

The EU Cyber Resilience Act makes secure boot and secure updates a requirement for connected products sold in Europe. Vulnerability reporting obligations took effect in September 2026, and the full set of essential requirements applies from December 2027. For most embedded teams, the boot chain is where those requirements hold up or fall apart.

This 30-minute session starts where many real attacks do: with an unsigned, unencrypted firmware binary posted on a manufacturer's website, and modern AI tools that make reverse engineering it fast. From that first discovered vulnerability, the session plays out as a contest between an attacker and a connected device. Each time the attacker gets in, we add the defense the CRA calls for: signed images verified by MCUboot on every boot, protection against rollback to vulnerable firmware, and closing the debug port. The session is built around the Microchip PIC32CK SG01 and the Curiosity Nano+ Touch board every attendee takes home. We show how the PIC32CK's Cortex-M33, TrustZone, and isolated Hardware Security Module anchor the chain of trust in silicon, and what it takes to move from a working demo to a production device.

Attendees leave with:

A step-by-step map from CRA essential requirements to specific boot, update, and debug protections.
A working model of MCUboot's signing, verification, and upgrade flow in Zephyr.
Production guidance on firmware encryption, key custody, anti-rollback, and debug lockdown.
Code to reproduce the session on their own board.

Trainers

Joe SchneiderDojo Five

Axel PetereitMicrochip

November 13 • 12:00-3:00 PM

Meetup

Linux Foundation: Yocto Project Meetup

Join the Linux Foundation Yocto Project meetup at edge lab LIVE! for community updates, technical discussion, and networking with embedded Linux builders.

Friday, November 13

Meetup

Tales from Y2K38: Creating a Custom Meta Layer to Replace IPMI for Cross-Industry Open Standards Hardware Platform Management

Embedded hardware is often in service for decades, outliving the software that manages it. Y2K38 exposure in IPMI implementations using signed 32-bit time handling offers a compelling example of the importance of ongoing modernization.

This session explores the rationale behind PICMG’s next-generation Hardware Platform Management standard, metaHPM, and the subsequent development of meta-picmg, a custom Yocto Project layer that translates common management requirements into reusable software integration. Building on OpenBMC’s existing Yocto/OpenEmbedded foundation and Redfish’s standardized management interfaces, the approach aims to bring consistent inventory, telemetry, power and thermal management, and firmware lifecycle operations to platforms serving industrial, telecommunications, medical, and defense applications.

We will follow the process from identifying shared hardware requirements to defining the standard and organizing its implementation into recipes, package groups, and configuration. Attendees will leave with an understanding of how HPM 2.0 and meta-picmg can reduce duplicated engineering effort, improve interoperability, and extend modern platform management across hardware vendors and industries.

Trainer

Doug SandyCTO, PICMG

After Parties & Side Events

@ edge lab LIVE! . Hall C5, Messe Munich

IoT Stars

Tuesday, November 10 · from 6:00 PM

Meet the right people, join unique discussions, and get inspired while having a drink, a bite, and a laugh.

What to expect:

Meet 200 strongly opinionated innovators in the embedded, IoT and edge AI space
Interactive keynotes, fireside chats and panels from industry leaders
Free drinks & food

An Evening of Edge AI and Edge Awards

with Shawn Hymel

Wednesday, November 11 · from 5:30 PM

Spend one evening getting up to speed on everything that's happening in edge AI.

What to expect:

Meet key players from across the edge AI ecosystem
Watch 6 cutting-edge edge AI demos, live
Join the official electronica Edge Awards ceremony
Free drinks, food and, of course, bow ties!

Ready for a Breakthrough in Your Next Commercial Embedded, Edge AI, or IoT Device Design?

Register for industry-leading workshops from best-in-class instructors and accelerate your time from prototype to production.

ELLi Workshop Hardware

This section is supported by DevKit HQ by Farnell, an Avnet company.

Free with Workshop Registration

Avnet, EBV Elektronik, Farnell, and Avnet Silica

Buy from DevKit HQ

Adiuvo Engineering

Adiuvo Engineering Explorer Board

The Adiuvo Engineering Explorer Board is an open-source AMD Artix UltraScale+ AU7P FPGA development platform. It provides 82K system logic cells, four Pmod connectors, high-speed I/O for Zmod and SYZYGY, USB-C power, and onboard JTAG and UART.

Buy from Adiuvo Engineering

Raspberry Pi

Raspberry Pi Compute Module 4 Lite, 1 GB RAM, Wi-Fi

Raspberry Pi Compute Module 4 Lite (CM4101000) brings Raspberry Pi 4 compute to a 55 mm × 40 mm module for embedded products. This variant has a quad-core Arm Cortex-A72, 1 GB LPDDR4 RAM, no onboard eMMC, and wireless LAN with Bluetooth 5.0. It also provides Gigabit Ethernet, USB 2.0, and PCIe Gen 2.

Featured in ELLi Workshop

CRA Conformance and Raspberry Pi: A Collaborative Analysis of Compliance Dos and Don’ts

Buy from DevKit HQ

Meet the ELLi Trainers

Learn directly from core contributors, hardware architects, and engineering leaders shaping the future of embedded systems.

Andreas Kofler

Founder & Managing Director, bavariamatic GmbH

Andreas Kofler is an embedded systems expert and founder and managing director of bavariamatic GmbH, an engineering company near Munich. Since 2008, he has worked on embedded electronics and firmware for connected products, specializing in Zephyr RTOS, motor control, and cybersecurity. Andreas has a strong focus on EU Cyber Resilience Act (CRA) compliance, helping manufacturers and startups understand their obligations and turn regulatory requirements into practical technical and organizational measures. Through bavariamatic’s CRA Readiness Check, he supports companies in assessing product security, identifying gaps, and implementing solutions such as secure boot, update mechanisms, SBOMs, and vulnerability management. As an active Zephyr Project contributor, Andreas also advocates for upstream development as an important part of secure, maintainable embedded products and CRA readiness.

Speaking in

CRA Expert Panel: From Requirements to Evidence Across the Embedded Supply Chain
CRA-Ready by Design: What Zephyr Gives You – and Why Staying Upstream Matters

Antonio Cirone

Product Marketing Engineer, Motion MEMS, STMicroelectronics

Antonio previously worked in the product MEMS division and supported American customers before focusing on Europe. Joining ST in 2011, he closely follows innovative applications enhanced by ST's MEMS sensor and analog product portfolio.

Speaking in

Scaling Physical AI Value from Smart Sensors to Industrial Intelligence

Christian Eder

Director Market Intelligence, congatec

Christian Eder is a cofounder of congatec and serves as Director Market Intelligence • Marketing. Christian – with his 30 years of experience in embedded computing – is the chairman of PICMG’s COM-HPC workgroup. He is also active in a number of other PICMG working groups and has served as an editor for the following specifications: COM Express 2.0, COM Express 2.1, COM Express Design Guide, Embedded EEPROM, Embedded EAPI, and COM Express 3.0. Christian is also board member of the SGET and editor of the SMARC 2.0 and 2.1 specifications. He holds a degree in Electrical Engineering from the University of Applied Sciences Regensburg, Germany.

Speaking in

Keynote: From Makers to Millions: Scaling Innovation for the AI Era

David Renno

Regional Marketing Director, Renesas Electronics

David Renno is a Regional Marketing Director at Renesas Electronics, where he drives broad-market growth and developer engagement initiatives across the embedded systems industry. Previously, he served as Director of Marketing and Business Development at Panthronics, helping establish market-leading NFC wireless solutions prior to the company’s acquisition by Renesas. Earlier in his career, David held marketing leadership roles at STMicroelectronics and ams AG, focusing on secure connectivity, NFC, mobile, wearable, and IoT technologies. With extensive experience spanning marketing, business development, and technology adoption, he is passionate about accelerating innovation and empowering developers through connected, intelligent embedded solutions.

Speaking in

Accelerate your Design Journey with the Developer Hub Integrated with Renesas 365

Dimi Tomov

CEO, EnactTrust

With over 20 years of experience in the field, Dimi Tomov is focused on securing the new generation of intelligent and connected devices. As CEO of EnactTrust, chair of the IoT Workgroup at the Trusted Computing Group (TCG), author of the public TPM 2.0 training courses available on OpenSecurityTraining2, and runs the TPM.dev developer community with of over 1,000 members. Dimi’s background is industrial automation, and over the years he has helped build the fastest Hearing Aid Detection Algorithm for Sivantos (ex Siemens Hearing aids), helped Spotify create the CarThing IoT product, and various other smart and connected systems sold from Australia to USA.

Speaking in

Locking down the Edge: How NVIDIA and OEMs Use TPM 2.0 to Secure Physical AI and Meet EU CRA requirements

Dominic Richter

Product and Partner Management at DT IoT

Dominic Richter works at Deutsche Telekom IoT, advancing NB-IoT, LTE-M, RedCap and satellite IoT. He engages with his team to developers and partners to bridge technology, product and partnerships to turn emerging connectivity into practical, measurable solutions for developers and users worldwide.

Speaking in

Edge Security for Cellular IoT Devices: How to Ensure Edge Security and CRA for Cellular IoT Devices with Exein and Deutsche Telekom

Doug Sandy

CTO, PICMG

Doug Sandy is the CTO for PICMG with over 24 years of industry experience in the embedded computing, industrial automation, telecommunications and cloud computing spaces. Doug has worked as Technical Fellow, Chief Technology Officer and Chief Architect for major corporations including Motorola, Emerson, and Artesyn Embedded Technologies. He has focused much of his career advancing industry standards that provide multi-vendor interoperability and COTS solutions such as DeviceNet, ETSI NFV, and the PICMG families of specifications.

Speaking in

Tales from Y2K38: Creating a Custom Meta Layer to Replace IPMI for Cross-Industry Open Standards Hardware Platform Management

Fausto Di Segni

Chief IoT & AI Officer at SECO

Fausto Di Segni is Chief IoT & AI Officer at SECO, bringing nearly two decades of experience in the technology industry. Throughout his career, he has held leadership positions at global technology companies, spanning technology consulting, digital transformation, business development, and strategic account management. He specializes in shaping innovative strategies, building strategic partnerships, and fostering collaboration across stakeholders to address complex business challenges. At SECO, he focuses on advancing the company's IoT and AI strategy, combining technological expertise with a business-driven approach to innovation and strategic partnerships.

Speaking in

Keynote: From Makers to Millions: Scaling Innovation for the AI Era

Guochu Chen

Software Director, RiseLink

Guochu Chen is the Software Director at RiseLink, where he leads SDK development, software architecture design, and end-to-end chip solution delivery. He holds multiple patents and has extensive engineering experience in wireless connectivity technologies such as Bluetooth, Wi-Fi, and Thread, as well as embedded real-time operating systems such as FreeRTOS.

Speaking in

Where Should the AI Run? Making the MCU, NPU, or Cloud Decision

Hooman Foroughi

VP Application Engineering, Renesas

Hooman Foroughi is Vice President of Systems Enablement Engineering at Renesas Electronics and a semiconductor industry leader with more than three decades of experience advancing embedded systems, software, and semiconductor technologies. He leads a global engineering organization that enables system-level solutions for embedded computing platforms, helping customers accelerate the development of complex products across industrial, infrastructure, AI, and connected systems markets. Throughout his career at Renesas, Motorola, HP, Compaq, and Tandem, Hooman has combined deep engineering expertise with business-focused leadership to transform complex technologies into scalable solutions and meaningful customer outcomes. A strong advocate for platform-based approaches and software-defined systems, he has helped drive key initiatives including Renesas 365, the Flexible Software Package (FSP) ecosystem, and adoption of Zephyr, advancing modern embedded development while expanding access to next-generation intelligent systems.

Speaking in

Accelerate your Design Journey with the Developer Hub Integrated with Renesas 365

Iain "Ming" Menzies-Runciman

EdgeBench.io

Seasoned Solutions Architect, Senior Programmer, and Project Manager with over 30 years of experience designing and implementing high-performance systems across banking, travel, and healthcare sectors. I have a proven track record of delivering complex projects, including systems ranked among the top 100 fastest supercomputers and robust solutions tested under real-world pressure. Ming is specialized in IoT (Embedded Linux), the Yocto build system, and Mender OTA updates. His expertise extends to Python, PHP, Bash, and Golang programming languages, with a strong focus on creating scalable, secure, and efficient solutions. He is also a PRINCE2 qualified Project Manager with extensive experience in training teams and delivering bespoke courses on Embedded Linux and IoT systems.

Speaking in

One Project, Many Boards: Building a Maintainable Yocto Platform Across Different Hardware

Izik Goldraich

Principal Software Engineer, Renesas

Izik Goldraich is a Principal Software Engineer and Solutions Architect at Renesas Electronics with extensive experience in embedded systems, secure connectivity, Edge AI, and IoT solutions. He specializes in transforming complex technologies into production-ready solutions spanning MCU and MPU platforms, wireless connectivity, embedded security, cloud integration, and AI at the edge. Izik has led the development of reference designs, proof-of-concept solutions, and technical demonstrations across diverse application domains, while collaborating with global engineering teams and customers worldwide.

Speaking in

Accelerate your Design Journey with the Developer Hub Integrated with Renesas 365

Jana Perić

Embedded Linux Engineer, Mender.io/Northern.tech

Jana is an Embedded Linux Engineer at Northern.tech, where she helps developers succeed (and occasionally survive) with Mender. Having shipped firmware updates into the wild, she has seen everything from flawless rollouts to devices that went mysteriously silent mid-update. She secretly enjoys debugging broken bootloaders and Yocto layers, always striving to turn complex embedded setups into something humans can actually maintain. She holds degrees in Electrical Engineering and an MBA.

Speaking in

Patch at Scale: What CRA-Ready Software Updates Look Like in the Real World

Jenirathese Nadar

Marketing Manager – Security, NXP Semiconductors

Jenirathese Nadar is the Regional Marketing Manager for Security and NFC at NXP Semiconductors, overseeing strategic initiatives across the EMEA region. With over a decade of experience in the security domain, Jenirathese began a career as a Field Application Engineer, contributing to smart card solutions for national passports and payment systems. Later transitioning into embedded security as a Product Marketing Manager, the focus shifted to secure microcontrollers and authentication technologies. Deep technical expertise is complemented by a passion for customer enablement, helping partners build secure and resilient systems while educating teams on cybersecurity best practices.

Speaking in

Cyber Resilience Act: From Compliance to Competitive Advantage

Jens Hagemeyer

Research Associate, CAPE

Jens is a research associate at Bielefeld University. His main research interests include heterogeneous and reconfigurable computing and its applications. He has authored more than 70 scientific publications and has been involved in several national and international research projects.

Speaking in

What If Edge Servers Were Composable? CXL, COM-HPC and CAPE

Johan Arvidsson

Key Account Manager, SPM Instrument AB

Johan Arvidsson is Key Account Manager for SPM Instrument AB, where he manages direct customers such as OEM and coordinates activities for global customers.

Speaking in

Scaling Physical AI Value from Smart Sensors to Industrial Intelligence

Kranti Kambhampati

Technical Solutions Engineering, Avnet

Speaking in

Build, Sense, and Visualize featuring the Infineon PSOC™ Edge
Bringing Amazon Sidewalk to Life: ST MEMS Sensor Monitoring with /IOTCONNECT

Manolis Marazakis

Principal Staff Research Scientist, FORTH (Greece)

Manolis Marazakis is a Principal Staff Research Scientist at the Institute of Computer Science, FORTH (Greece). His research interests are in architectures and efficient systems software, mainly resource management and storage I/O middleware, for high-performance servers in datacenter environments. He has contributed to the design, implementation and performance analysis of several system prototypes for HPC, data analytics, multi-tenant workloads, and the convergence of HPC and Cloud infrastructures. He is the coordinator of the HIGHER project (https://higher-project.eu/) that is creating and validating open-source designs for high-density rack-scale systems supporting cloud and edge services.

Speaking in

From Unauthenticated Netboot to CRA-ready Industrial Gateways: Measured Boot and Remote Attestation on Bare-metal RISC-V

Mark Reiten

Senior Corporate Vice President and Executive Leadership Team

Mark Reiten serves as Senior Corporate Vice President at Microchip, where he oversees the company's Licensing, Memory and Intelligent Compute product lines. Reiten is also the current leader of Microchip’s Office of Technology Strategy to help align cross-company technology sharing efforts. Prior to these roles, Reiten was the Vice President of the Licensing Business Unit, and he also spearheaded Microchip’s Patent Monetization activities. Joining Microchip in 2010 as part of the acquisition of Silicon Storage Technology, Reiten has played a pivotal role in the development and launch of the company’s Edge AI initiative. His extensive experience includes over 40 years in high tech, starting as a Systems Analyst and transitioning to Business Management roles of every increasing responsibility. Reiten holds a Bachelor of Science degree in Economics and a BA in Political Science from the University of Minnesota and is based at Microchip’s facility in San Jose, California.

Speaking in

The Rise of Physical AI: The Next Evolution of Intelligent Systems

Marta Rybczynska

Open Source Security & CRA Expert

Speaking in

CRA Conformance and Raspberry Pi: A Collaborative Analysis of Compliance Dos and Don’ts
How to Be a Secure Component in the Embedded Product Supply Chain
CRA Expert Panel: From Requirements to Evidence Across the Embedded Supply Chain

Martin Unverdorben

Chairman of SDT.01 | SGET e.V.

Martin Unverdorben started his career 28 years ago as a trainer for communications technology, before joining Kontron as a Field Application Engineer. In 2016 he switched to a position as product manager, responsible for the SMARC and COM-HPC Client product lines. Since 2023 he has been responsible for the Customer Information Center at Tria Technologies. He is a member of the board of the Standardization Group for Embedded Technologies (SGET) and chairman of SDT.01, the standard development team responsible for the SMARC module specification. He was also the editor of the Open Standard Module (OSM) specification and the COM Express Design Guide.

Speaking in

SMARC Carrier Board Design: What Really Matters — 90 Minutes of Practical Design Guidance for Hardware Engineers

Matteo Del Balio

Product & Program Manager

Matteo Del Balio is a Product & Program Manager at SECO with over 10 years of experience in B2B platforms, products and service design. He leads cross-functional teams across product, marketing, UX and engineering, defining strategy, roadmap and go-to-market for SECO’s IoT and Edge AI platforms. He works closely with engineering on the Clea software stack, from secure embedded OS and OTA updates to AI deployment at the edge, turning product requirements into solutions ready for industrial production. His focus is making complex technology clear, reliable and valuable for customers worldwide

Speaking in

From Visual Workflow to CRA-Ready Edge Deployment

Michael Lamp

Director of Global IoT Enablement, Avnet

Speaking in

Build, Sense, and Visualize featuring the Infineon PSOC™ Edge
Bringing Amazon Sidewalk to Life: ST MEMS Sensor Monitoring with /IOTCONNECT

Mubeen Abbas

Technical Manager, NXP Semiconductors

Mubeen Abbas is a Technical Manager at NXP Semiconductors, with a focus on enabling customers to develop next-generation intelligent edge systems. With expertise in embedded processing, Linux-based software platforms, AI/ML deployment, and secure connected devices, he works closely with developers, partners, and customers to accelerate innovation from concept to production.

Speaking in

AI at the Edge with i.MX Applications Processors: Enabling the Next Generation of Secure and Scalable Devices

Muhammad Aashir

Founder and CEO, AegisSafeForge

Muhammad Aashir is a functional safety engineer and the Founder and CEO of AegisSafeForge. He holds a Master’s degree in Functional Safety Engineering from the University of Kassel. His work combines functional safety, automotive cybersecurity, systems engineering, and human-governed AI. He is currently building practical workflows that connect product information, requirements, risk analysis, SBOMs, vulnerability decisions, and compliance evidence for safety- and cybersecurity-critical products.

Speaking in

From Firmware Build to CRA Evidence: A Reproducible SBOM and Vulnerability Workflow

Nick Kossifidis

Principal Research Engineer

Speaking in

From Unauthenticated Netboot to CRA-ready Industrial Gateways: Measured Boot and Remote Attestation on Bare-metal RISC-V

Olivier Bloch

Host, IoT Show podcast

I’m a tech enthusiast, IoT technical advisor and all‑around DevRel pro with a passion for democratizing complex technologies—from embedded to edge to cloud. Today, I’m Director of DevRel at Qualcomm Technologies, Inc. You might know me as the host of The IoT Show, the ex‑Microsoft IoT guy or an IoT and DevRel advisor. My journey started as an embedded developer and consultant (those were the days!). I later became a Technical Evangelist for Microsoft France and Microsoft Corporation, and spent time with Microsoft Open Technologies working across open-source communities—from web and JavaScript to gaming and IoT. I then spent seven years helping build core IoT services on Azure. Between Microsoft and Qualcomm, I ran my own advisory firm, helping industrial players adopt IoT and edge AI—while always advocating for developers. Let’s connect and geek out about sensors, connectivity, physical AI or the industrial metaverse.

Speaking in

An Evening of Edge AI and Edge Awards with Shawn Hymel

Orr Danon

Appointed Vice President, AI

Orr Danon serves as Appointed Vice President of AI at Microchip Technology, where he leads the company's future development of intelligent computing solutions and AI strategy across edge and embedded platforms. Danon joined Microchip through its acquisition of Hailo, the pioneering edge AI processor company he co-founded and led as Chief Executive Officer. Under his leadership, Hailo became a recognized leader in high-performance, low-power AI acceleration solutions for automotive, industrial, smart city, retail and robotics applications. Prior to Hailo, Danon spent more than a decade in a leading an Israeli technological unit, where he led large-scale multidisciplinary technology programs and received the Israel Defense Award. Danon holds a B.Sc. in Physics and Mathematics from the Hebrew University of Jerusalem through the Talpiot program and an M.Sc. in Electrical Engineering from Tel Aviv University.

Speaking in

The Rise of Physical AI: The Next Evolution of Intelligent Systems

Ozan Durgut

Embedded Linux Engineer, Analog Devices

Ozan Durgut is an Embedded Linux Engineer at Analog Devices and a master’s student at TUM. His work includes open-source contributions to embedded systems and low-level software, particularly in Linux-based platforms. He has authored multiple publications in computer vision and embedded AI, and co-authored books on embedded image processing with microcontrollers. He received the IEEE Young Researchers Best Paper Award in 2024.

Speaking in

Stop Hacking Hardware Test Scripts—Hack on Hardware with Friends

Radek Sestak

Sr. Automotive Applications Engineer, NXP Semiconductors

Application Engineer at NXP Semiconductors, where he has been helping engineers succeed with automotive microcontrollers since 2010. Throughout his career, he has worked across technical support, motor control, software development, and technical marketing. He enjoys transforming complex technologies into practical learning experiences through workshops, demonstrations, technical content, and developer enablement activities. His focus is on making embedded development more accessible, productive, and enjoyable for engineers.

Speaking in

Accelerate Embedded Development with the FRDM Automotive Platform: Exploring Real-Time Control, Sensing, and Visualization

Raul Muñoz

Senior Staff Engineer and Developer Relations Lead, Qualcomm

Raul Munoz is a Developer Relations Engineer at Qualcomm, focused on the Dragonwing platform and helping developers build the next generation of embedded and edge computing products. He has more than 15 years of experience with Embedded Linux, working across software development, technical sales, developer relations, and product enablement. Before joining Qualcomm, Raul worked at Foundries.io on technologies for building, securing, and maintaining Linux-based IoT and edge devices, and spent six years at Toradex as a Field Application Engineer in Brazil. Throughout his career, Raul has been actively involved in the embedded community through technical talks, hands-on workshops, events, videos, and open-source initiatives, with a particular interest in Embedded Linux, Yocto, containers, device lifecycle management, and Edge AI.

Speaking in

Voice to Action: Building Portable Edge AI Applications with Linux and Containers
Yocto, Containers and Edge AI: Making All the Pieces Work Together

Satyajit Sinha

Senior Principal Analyst, IoT Component, Connectivity & Security, IoT Analytics

Speaking in

CRA Expert Panel: From Requirements to Evidence Across the Embedded Supply Chain
Scaling Physical AI Value from Smart Sensors to Industrial Intelligence

Shawn Hymel

Founder at Skal Risa

Shawn Hymel is a course creator and instructor for edge AI and embedded systems that inspire and teach developers of all skill levels. He can be found giving talks, running workshops, and swing dancing in his free time. You can find Shawn on most major social media platforms: https://linktr.ee/shawnhymel

Speaking in

Reinforcement Learning for Robotics
An Evening of Edge AI and Edge Awards with Shawn Hymel

Steven Dettloff

IoT Solutions Manager, Avnet

In his current role, Steven Dettloff is Avnet's IoT Solutions Manager, responsible for the global enablement of supplier/partners products on Avnet's /IOTCONNECT platform. Previously, Steven developed and deployed end-to-end connected IoT solutions for OEMs, System Integrators and VARs as an IoT Solutions Architect. Steven also comes from a decade-long product development background having led multiple technology teams in the automotive industry. He holds a BS in Electrical Engineering from the University of Michigan.

Speaking in

Build, Sense, and Visualize featuring the Infineon PSOC™ Edge
Bringing Amazon Sidewalk to Life: ST MEMS Sensor Monitoring with /IOTCONNECT

Tess Kassier

RiseLink.ai

Tess Kassier is a product leader focused on bringing emerging technologies from prototype to real-world adoption. She serves as fractional Head of Go-to-Market at RiseLink, where she focuses on edge AI and developer ecosystem strategy. She is also an Entrepreneur-in-Residence at Yale Ventures and co-founder of a stealth AI-native healthtech startup. Previously, Tess led product and strategic partnership initiatives at Delphix (acquired in 2024) and was an early employee at Via, a transit technology company that went public in 2025, working across product and operations. Her expertise lies at the intersection of technology, product strategy, and commercialization–helping teams determine not only how to bring new technologies to market, but what is worth building, for whom, and how to turn promising innovations into successful, scalable products.

Speaking in

Where Should the AI Run? Making the MCU, NPU, or Cloud Decision

Thibault Richard

Field Application Engineer, EBV Elektronik

Thibault Richard is a Field Application Engineer specializing in connectivity solutions at EBV Elektronik. He supports customers across embedded connectivity, cloud integration, security, and IoT system design, helping organizations accelerate development from evaluation to deployment. His expertise includes wireless connectivity, embedded security integration, cloud-connected applications, AWS and Avnet /IOTCONNECT architectures, Zephyr OS, Linux-based systems, and secure device design. Thibault regularly delivers technical workshops and training sessions across Europe, focused on practical implementation of connected and secure embedded solutions.

Speaking in

Build, Sense, and Visualize featuring the Infineon PSOC™ Edge
Bringing Amazon Sidewalk to Life: ST MEMS Sensor Monitoring with /IOTCONNECT

Thomas Roos

Senior Field Solutions Engineer, Exein

Thomas Roos is a Senior Field Solutions Engineer at Exein, a European cybersecurity unicorn, where he helps organizations secure embedded and IoT devices at scale. His career spans the full spectrum, from small and medium businesses to Big Tech at AWS IoT, giving him hands-on perspective across cloud-to-device deployments. He serves on the board of the Yocto Project, and focuses on physical AI cybersecurity, open-source development, and runtime protection for connected devices.

Speaking in

Edge Security for Cellular IoT Devices: How to Ensure Edge Security and CRA for Cellular IoT Devices with Exein and Deutsche Telekom

Valerie Aurora

CRA consultant

Valerie Aurora is a Cyber Resilience Act expert, systems software engineer, and experienced speaker. She wrote significant parts of the operating systems CRA standard and four other standards, working in close collaboration with manufacturers and regulators, and co-organized the CRA Forum for a Safer Europe. During her career, Valerie ported a real-time OS, maintained an embedded Linux distribution, developed several file systems, and wrote code at every level of the network stack. She uses her expertise in both standards and hands-on systems engineering to help companies comply with the CRA. She enjoys finding ways to communicate about technical topics in an understandable and entertaining way.

Speaking in

How to Think About CRA Compliance

Conference Committee

The community leaders shaping the edge lab LIVE! programme.

Benjamin Cabé

the Zephyr Project

David Sandys

Digi-Key

Gábor Kiss-Vámosi

LVGL

Kate Stewart

Linux Foundation

Kudzai Manditereza

HiveMQ

Martin Unverdorben

Tria, an Avnet company

Michael Opdenacker

Root Commit

Shawn Hymel

Skal Risa

Organizers

Meet the team behind edge lab LIVE! at electronica 2026.

Brandon Lewis

Conference Director

ThroughPut Marketing

Brandon Lewis is an experienced technical storyteller and integrated marketing strategist with a passion for making complex technology accessible, relevant and engaging. ThroughPut, his media and marketing agency, focuses on embedded and high-tech markets, helping companies reach and engage the right audiences. Currently, Brandon is reimagining how technology media and marketing can work together to help ambitious tech companies stand out in an increasingly complex market.

Josef Holzmayr

Developer Enablement Expert

Mender.io

Josef has been active for more than 15 years as a "Complete"-Stack developer for industrial controls by now. He's done everything from debugging hardware to writing drivers, from application development to web front ends. A passion for showing, telling, and teaching people in both entertaining and engaging ways led Josef to Mender.io. Here, he tries to make the world better and more secure by enabling OTA updates for as many devices as possible. Taking this passion, combining it with a keen interest in building systems and how they can be brought to the next generation of developers, Josef has been awarded Ambassador status and is serving as Community Manager for the Yocto Project. As such, Josef has also reached many thousands of aspiring developers not only through his presentations at various events and conferences but also by livecoding sessions and webinars. Josef holds a degree in Electrical Engineering / Computer Science from the University of Applied Sciences, Ingolstadt.

Marta Rybczynska

Open Source Security & CRA Expert

Ygreky

Marta Rybczynska has network security background, 20 years of experience in Open Source including 15 in embedded development. She has been working with embedded operating systems like Linux and various real-time ones, system libraries and frameworks up to user interfaces. Her specialties are architecture-specific parts of the Linux kernel. In the past, Marta served as Vice-President and treasurer for KDE e.V. She is involved in various Open Source projects, and also contributing kernel-related guest articles for LWN.net. She's a member of the security team of the Yocto Project and a co-maintainer of meta-security. She has experience with presentations on both scientific and free software conferences, including LinuxCon, Open Source Summit, Embedded Linux Conference, Akademy and FOSDEM.

Iain "Ming" Menzies-Runciman

Yocto Project Linux Consultant

Edge Computing Workbench, Silicon Blade Consultants

Lesley Harmoning

Conference Director

LHM & Co

Lesley is the founder of LHM & Co. and a member of the leadership team behind edge lab LIVE @ electronica. With nearly 25 years in the electronics industry, including 13 years with one of the world’s largest electronic component distributors, she brings deep experience in industry media, marketing, partnerships, and audience development. Through LHM & Co., she has spent more than a decade helping electronics and technology companies around the world connect with the right audiences and turn strategy into results.

Laurens Slats

Developer Relations & IoT Geek

IoT Stars

Marc Pous

Developer Advocate

IoT Stars

Marc Pous, also known as the IoT Giant, is the founder of IoT Stars and a long-time advocate for the Internet of Things. With over 15 years of experience, he has been actively building IoT products, communities, and events around the world.

Ansgar Hein

Chairman of the Board

Standardization Group for Embedded Technologies e.V. (SGET)

With more than 25 years of experience spanning technology, strategic business development, and international marketing, Ansgar Hein combines technical understanding with a strong focus on ecosystem building and industry collaboration. As a frequent speaker and moderator, Ansgar is known for translating complex technical topics into practical and engaging insights.

Ionela Victoria Mihalcea

Event Manager

edge lab LIVE!

Ionela turns ideas into experiences people remember. Working at the intersection of tech and arts, she builds conferences and makes the magic happen. She brings people together, builds lasting partnerships and grows communities that go beyond the event itself.

FAQs

This FAQ covers the most important topics for attending edge lab LIVE! at electronica 2026.

If you can't find the answer you're looking for, feel free to contact us anytime at info@edgelablive.com.

Do I need to register separately for edge lab LIVE!?
No! Separate registration is only required for hands-on workshops where you will take home the hardware used during the session. All workshop sessions are heavily subsidized, but if you don't plan on taking home hardware and are okay with the possibility of standing, feel free to join us at no cost! All other content besides evening events is also free to attend!
Can I attend only selected sessions?
Yes. You can freely choose which sessions to attend. Please note that pre-registration is required for workshops due to limited capacity.
Where can I find the conference programme?
View the full edge lab LIVE! programme here →

Welcome to theedge lab LIVE! Attendee Hub

edge lab LIVE! All Access Pass

Hands-On Workshops — All Access Pass

Evening Events — All Access Pass

CRA Day — All Access Pass

FREE edge lab LIVE!

ELLi for Dev Teams

The embedded, IoT & edge AI developer zone at electronica

Keynote: From Makers to Millions: Scaling Innovation for the AI Era

Voice to Action: Building Portable Edge AI Applications with Linux and Containers

What If Edge Servers Were Composable? CXL, COM-HPC and CAPE

Accelerate Embedded Development with the FRDM Automotive Platform: Exploring Real-Time Control, Sensing, and Visualization

Build Professional UIs with LVGL on Riverdi's STM32U5 Board

Stop Hacking Hardware Test Scripts—Hack on Hardware with Friends

One Project, Many Boards: Building a Maintainable Yocto Platform Across Different Hardware

Yocto, Containers and Edge AI: Making All the Pieces Work Together

SMARC Carrier Board Design: What Really Matters — 90 Minutes of Practical Design Guidance for Hardware Engineers

IoT Stars

The Rise of Physical AI: The Next Evolution of Intelligent Systems

Bringing Amazon Sidewalk to Life: ST MEMS Sensor Monitoring with /IOTCONNECT

Build, Sense, and Visualize featuring the Infineon PSOC™ Edge

Accelerate your Design Journey with the Developer Hub Integrated with Renesas 365

AI at the Edge with i.MX Applications Processors: Enabling the Next Generation of Secure and Scalable Devices

Reinforcement Learning for Robotics

Scaling Physical AI Value from Smart Sensors to Industrial Intelligence

An Evening of Edge AI and Edge Awards with Shawn Hymel

Where Should the AI Run? Making the MCU, NPU, or Cloud Decision

How to Think About CRA Compliance

Cyber Resilience Act: From Compliance to Competitive Advantage

Locking down the Edge: How NVIDIA and OEMs Use TPM 2.0 to Secure Physical AI and Meet EU CRA requirements

From Unauthenticated Netboot to CRA-ready Industrial Gateways: Measured Boot and Remote Attestation on Bare-metal RISC-V

From Firmware Build to CRA Evidence: A Reproducible SBOM and Vulnerability Workflow

CRA Conformance and Raspberry Pi: A Collaborative Analysis of Compliance Dos and Don’ts

How to Be a Secure Component in the Embedded Product Supply Chain

Patch at Scale: What CRA-Ready Software Updates Look Like in the Real World

From Visual Workflow to CRA-Ready Edge Deployment

Edge Security for Cellular IoT Devices: How to Ensure Edge Security and CRA for Cellular IoT Devices with Exein and Deutsche Telekom

CRA Expert Panel: From Requirements to Evidence Across the Embedded Supply Chain

Linux Foundation: Zephyr Project Meetup

Getting OTA Working on Zephyr: It Can't Be That Difficult, Can It?

Zephyr Snow Predictor

Konfig & Devicetree: The Good, the Bad, and the Ugly

Bringing Robust OTA Updates to Zephyr: Real-World Insights & Approaches

CRA-Ready by Design: What Zephyr Gives You – and Why Staying Upstream Matters

Root of Trust to Release: Boot-Level Security with Zephyr and MCUboot on the PIC32CK

Linux Foundation: Yocto Project Meetup

Tales from Y2K38: Creating a Custom Meta Layer to Replace IPMI for Cross-Industry Open Standards Hardware Platform Management

After Parties & Side Events

IoT Stars

An Evening of Edge AI and Edge Awards

Ready for a Breakthrough in Your Next Commercial Embedded, Edge AI, or IoT Device Design?

ELLi Workshop Hardware

Workshop Hardware

FRDM-A-S32K344 Development Board

FRDM i.MX 95 Development Board

RVT50HQSNWN00 STM32 5-inch TFT LCD Embedded Display

Renesas RA2E3 Fast Prototyping Board

Infineon PSOC™ Edge E84 AI Evaluation Kit

BALA-C PLUS ESP32 Self-Balancing Robot Kit

ST NUCLEO-WL55JC LoRa Development Board for LPWAN & IoT Prototyping

ST X-NUCLEO-IKS5A1 MEMS Sensor Expansion Shield

nRF9151 DK Cellular IoT development kit for LTE-M, NB-IoT, GNSS and DECT NR+

TS-7100-Z

Arduino® UNO Q

Arduino VENTUNO Q

Qualcomm Dragonwing™ IQ8 EVK

Qualcomm Dragonwing IQ9 EVK

Adiuvo Engineering Explorer Board

Raspberry Pi Compute Module 4 Lite, 1 GB RAM, Wi-Fi

Meet the ELLi Trainers

Andreas Kofler

Antonio Cirone

Christian Eder

David Renno

Dimi Tomov

Dominic Richter

Doug Sandy

Fausto Di Segni

Guochu Chen

Hooman Foroughi

Welcome to the
edge lab LIVE! Attendee Hub